565db19e3d
This patch enhances irqbalance so that, it considers the proximity of devices to cpus when making irq mapping decisions. In large numa systems this will cause irqs to be biased such that they have unique affinity for cpus on the same numa node as the device triggering them. Resolves: http://code.google.com/p/irqbalance/issues/detail?id=17 Thanks to Petr Holasek for authoring the patch git-svn-id: https://irqbalance.googlecode.com/svn/trunk@34 46b42954-3823-0410-bd82-eb80b452c9b5
96 lines
1.2 KiB
C
96 lines
1.2 KiB
C
#ifndef _INCLUDE_GUARD_TYPES_H
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#define _INCLUDE_GUARD_TYPES_H
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#include <glib.h>
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#include "cpumask.h"
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#define BALANCE_NONE 0
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#define BALANCE_PACKAGE 1
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#define BALANCE_CACHE 2
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#define BALANCE_CORE 3
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#define IRQ_OTHER 0
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#define IRQ_LEGACY 1
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#define IRQ_SCSI 2
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#define IRQ_TIMER 3
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#define IRQ_ETH 4
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#define IRQ_GETH 5
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#define IRQ_TGETH 6
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struct package {
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uint64_t workload;
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int number;
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cpumask_t mask;
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int node_num;
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int class_count[7];
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GList *cache_domains;
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GList *interrupts;
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};
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struct cache_domain {
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uint64_t workload;
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int number;
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int marker;
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int node_num;
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cpumask_t mask;
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cpumask_t package_mask;
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int class_count[7];
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GList *cpu_cores;
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GList *interrupts;
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};
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struct cpu_core {
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uint64_t workload;
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int number;
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int marker;
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int node_num;
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int class_count[7];
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cpumask_t package_mask;
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cpumask_t cache_mask;
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cpumask_t mask;
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GList *interrupts;
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};
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struct interrupt {
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uint64_t workload;
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int balance_level;
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int number;
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int class;
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int node_num;
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int msi;
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uint64_t count;
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uint64_t old_count;
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uint64_t extra;
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cpumask_t mask;
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cpumask_t old_mask;
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cpumask_t numa_mask;
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cpumask_t allowed_mask;
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/* user/driver provided for smarter balancing */
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cpumask_t node_mask;
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};
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#endif
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