6e217da60d
When computing the load_slice per irq we take the topology object load divided by the interrupt count for the object. Both of these values are integervalues which means if the interrupt count is larger than the load we get a load_slice of 0. It seems likely that on modern processors interrupt durations will be at least multiple nanoseconds long so if we compute load in nanoseconds it should be >= the interrupt count. The load is recomputed every SLEEP_INTERVAL which is currently 10s which makes the maximum possible load 10e9 which easily fits in a uint64_t. Note: corrected error checking on sysconf usage Signed-off-by: Shawn Bohrer <sbohrer@rgmadvisors.com> Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
34 lines
818 B
C
34 lines
818 B
C
#ifndef __INCLUDE_GUARD_CONSTANTS_H
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#define __INCLUDE_GUARD_CONSTANTS_H
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/* interval between rebalance attempts in seconds */
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#define SLEEP_INTERVAL 10
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#define NSEC_PER_SEC 1e9
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/* NUMA topology refresh intervals, in units of SLEEP_INTERVAL */
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#define NUMA_REFRESH_INTERVAL 32
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/* NIC interrupt refresh interval, in units of SLEEP_INTERVAL */
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#define NIC_REFRESH_INTERVAL 32
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/* minimum number of interrupts since boot for an interrupt to matter */
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#define MIN_IRQ_COUNT 20
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/* balancing tunings */
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#define CROSS_PACKAGE_PENALTY 3000
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#define NUMA_PENALTY 500
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#define POWER_MODE_PACKAGE_THRESHOLD 20000
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#define CLASS_VIOLATION_PENTALTY 6000
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#define MSI_CACHE_PENALTY 10000
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#define CORE_SPECIFIC_THRESHOLD 5000
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/* power mode */
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#define POWER_MODE_SOFTIRQ_THRESHOLD 20
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#define POWER_MODE_HYSTERESIS 3
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#endif
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