7bc1244fbf
This originally surfaced as a bug in placing network interrupts. In
the case that this submitter observed, the NIC card was in NUMA domain
0, but each RSS interrupt was getting an affinity list for all CPUs in
the domain. The expected behavior is for a single cpu to be chosen when
attempting to fan out NIC interrupts. Due to other implementation
details of interrupt placement, this effectively caused all interrupt
mappings for this NIC to end up on CPU 0.
The bug turns out ot have been caused by Intel Cluster on Die breaking
an assumption in irqbalance about the design of the component hierarchy.
The CoD topology allows a CPU package to belong to more than one NUMA
node, which is not expected.
The RCA was that when the second NUMA node was wired up to the existing
physical package, it overwrote the mappings that were placed there by
the first.
This patch attempts to solve that problem by permitting a package to
have multiple NUMA nodes. The CPU component hierarchy is preserved, in
case other parts of the code depend upon walking it. When a CoD
topology is detected, the NUMA node -> CPU component mapping is moved
down a level, so that the nodes point to the first level where the
affinity becomes distinct. In practice, this has been observed to be
the LLC.
A quick illustration (now, with COD, it looks like this):
+-----------+
| NUMA Node |
| 0 |
+-----------+
|
| +-------+
\|/ / | CPU 0 |
+---------+ +-------+
| Cache 0 |
+---------+ +-------+
/ \ | CPU 1 |
+-----------+ +-------+
| Package 0 |
+-----------+ +-------+
\ / | CPU 2 |
+---------+ +-------+
| Cache 1 |
+---------+
^ \ +-------+
| | CPU 3 |
| +-------+
+-----------+
| NUMA Node |
| 1 |
+-----------+
Whereas, previously only NUMA Node 1 would end up pointing to package 0.
The topology should not be different on platforms that do not enable
CoD.
Signed-off-by: Krister Johansen <kjlx@templeofstupid.com>
165 lines
3.9 KiB
C
165 lines
3.9 KiB
C
#ifndef __INCLUDE_GUARD_IRQBALANCE_H_
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#define __INCLUDE_GUARD_IRQBALANCE_H_
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#include "constants.h"
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#include "cpumask.h"
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#include <stdint.h>
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#include <glib.h>
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#include <glib-unix.h>
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#include <syslog.h>
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#include <limits.h>
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#include "types.h"
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#include "config.h"
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#ifdef __aarch64__
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#define AARCH64
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#endif
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#ifdef HAVE_NUMA_H
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#include <numa.h>
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#else
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#define numa_available() -1
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#endif
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#ifdef HAVE_LIBSYSTEMD
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#include <systemd/sd-journal.h>
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#endif
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extern int package_count;
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extern int cache_domain_count;
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extern int core_count;
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extern char *classes[];
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extern void parse_cpu_tree(void);
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extern void clear_work_stats(void);
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extern void parse_proc_interrupts(void);
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extern GList* collect_full_irq_list();
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extern void parse_proc_stat(void);
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extern void set_interrupt_count(int number, uint64_t count);
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extern void set_msi_interrupt_numa(int number);
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extern GList *rebalance_irq_list;
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void update_migration_status(void);
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void dump_workloads(void);
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void sort_irq_list(GList **list);
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void calculate_placement(void);
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void dump_tree(void);
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void activate_mappings(void);
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void clear_cpu_tree(void);
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/*===================NEW BALANCER FUNCTIONS============================*/
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/*
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* Master topo_obj type lists
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*/
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extern GList *numa_nodes;
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extern GList *packages;
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extern GList *cache_domains;
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extern GList *cpus;
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extern int numa_avail;
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extern GList *cl_banned_irqs;
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extern int debug_mode;
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extern int journal_logging;
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extern int one_shot_mode;
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extern int need_rescan;
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extern unsigned long long cycle_count;
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extern unsigned long power_thresh;
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extern unsigned long deepest_cache;
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extern char *banscript;
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extern char *polscript;
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extern cpumask_t banned_cpus;
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extern cpumask_t unbanned_cpus;
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extern long HZ;
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/*
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* Numa node access routines
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*/
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extern void build_numa_node_list(void);
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extern void free_numa_node_list(void);
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extern void dump_numa_node_info(struct topo_obj *node, void *data);
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extern void connect_cpu_mem_topo(struct topo_obj *p, void *data);
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extern struct topo_obj *get_numa_node(int nodeid);
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/*
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* cpu core functions
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*/
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#define cpu_numa_node(cpu) ((cpu)->parent->numa_nodes)
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extern struct topo_obj *find_cpu_core(int cpunr);
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extern int get_cpu_count(void);
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/*
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* irq db functions
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*/
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extern void rebuild_irq_db(void);
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extern void free_irq_db(void);
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extern void add_cl_banned_irq(int irq);
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extern void for_each_irq(GList *list, void (*cb)(struct irq_info *info, void *data), void *data);
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extern struct irq_info *get_irq_info(int irq);
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extern void migrate_irq(GList **from, GList **to, struct irq_info *info);
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extern void free_cl_opts(void);
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extern void add_cl_banned_module(char *modname);
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#define irq_numa_node(irq) ((irq)->numa_node)
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/*
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* Generic object functions
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*/
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static inline void for_each_object(GList *list, void (*cb)(struct topo_obj *obj, void *data), void *data)
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{
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GList *entry, *next;
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entry = g_list_first(list);
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while (entry) {
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next = g_list_next(entry);
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cb(entry->data, data);
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entry = next;
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}
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}
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/*
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* Logging functions
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*/
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#define TO_SYSLOG (1 << 0)
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#define TO_CONSOLE (1 << 1)
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#define TO_ALL (TO_SYSLOG | TO_CONSOLE)
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extern const char * log_indent;
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extern unsigned int log_mask;
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#ifdef HAVE_LIBSYSTEMD
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#define log(mask, lvl, fmt, args...) do { \
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if (journal_logging) { \
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sd_journal_print(lvl, fmt, ##args); \
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if (log_mask & mask & TO_CONSOLE) \
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printf(fmt, ##args); \
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} else { \
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if (log_mask & mask & TO_SYSLOG) \
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syslog(lvl, fmt, ##args); \
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if (log_mask & mask & TO_CONSOLE) \
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printf(fmt, ##args); \
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} \
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}while(0)
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#else /* ! HAVE_LIBSYSTEMD */
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#define log(mask, lvl, fmt, args...) do { \
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if (journal_logging) { \
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printf("<%d>", lvl); \
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printf(fmt, ##args); \
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} else { \
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if (log_mask & mask & TO_SYSLOG) \
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syslog(lvl, fmt, ##args); \
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if (log_mask & mask & TO_CONSOLE) \
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printf(fmt, ##args); \
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} \
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}while(0)
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#endif /* HAVE_LIBSYSTEMD */
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#define SOCKET_PATH "irqbalance"
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#endif /* __INCLUDE_GUARD_IRQBALANCE_H_ */
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