32a7757a03
irqbalance has been broken for a long time. Its ability to properly detect msi irqs and to correctly identify interrupt types (net vs. storage vs. other, etc), has been based on some tenuous string comparison logic that was easily broken by administrative name changes for interfaces. I've recently submitted this patch: https://lkml.org/lkml/2011/9/19/176 Which lets us use sysfs exclusively for finding device interrupts, which in turns lets us definitavely identify irq types (legacy pci vs. msi), as well as properly classifying them using the pci device class value. Additionally, this patch rips out the code that attemtps to bias interrupt count volumes using network statistics, since theres no sane way to be certain a single network interrupt is responsible for the number of packets received on a given interface. Workload computation is now done on soley on irq count. This may change in the future, adding /proc/stat irq and softirq time to the biasing mechanism. Note that without the above kernel change, this doesn't work right. Irqbalance contains a self check in which it identifies MSI interrupts in /proc/interrupts still. If it sees MSI irqs in /proc/interrupts, but none in sysfs, then it will issue a loud warning about irqs being missclassified until the kernel is updated. Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
115 lines
1.4 KiB
C
115 lines
1.4 KiB
C
#ifndef _INCLUDE_GUARD_TYPES_H
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#define _INCLUDE_GUARD_TYPES_H
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#include <glib.h>
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#include "cpumask.h"
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#define BALANCE_NONE 0
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#define BALANCE_PACKAGE 1
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#define BALANCE_CACHE 2
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#define BALANCE_CORE 3
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/*
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* IRQ Classes
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*/
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#define IRQ_OTHER 0
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#define IRQ_LEGACY 1
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#define IRQ_SCSI 2
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#define IRQ_TIMER 3
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#define IRQ_ETH 4
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/*
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* IRQ Types
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*/
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#define IRQ_TYPE_LEGACY 0
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#define IRQ_TYPE_MSI 1
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#define IRQ_TYPE_MSIX 2
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/*
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* IRQ properties
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*/
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enum irq_prop {
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IRQ_CLASS = 0,
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IRQ_TYPE,
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IRQ_NUMA,
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IRQ_LCPU_MASK,
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IRQ_MAX_PROPERTY
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};
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struct package {
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uint64_t workload;
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int number;
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cpumask_t mask;
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int node_num;
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int class_count[7];
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GList *cache_domains;
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GList *interrupts;
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};
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struct cache_domain {
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uint64_t workload;
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int number;
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int marker;
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int node_num;
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cpumask_t mask;
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cpumask_t package_mask;
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int class_count[7];
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GList *cpu_cores;
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GList *interrupts;
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};
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struct cpu_core {
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uint64_t workload;
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int number;
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int marker;
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int node_num;
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int class_count[7];
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cpumask_t package_mask;
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cpumask_t cache_mask;
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cpumask_t mask;
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GList *interrupts;
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};
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struct interrupt {
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uint64_t workload;
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int balance_level;
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int number;
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int class;
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int node_num;
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int msi;
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uint64_t count;
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uint64_t old_count;
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uint64_t extra;
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cpumask_t mask;
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cpumask_t old_mask;
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cpumask_t numa_mask;
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cpumask_t allowed_mask;
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/* user/driver provided for smarter balancing */
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cpumask_t node_mask;
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};
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#endif
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